Lista publikacji

Rozprawa doktorska

Rozprawa doktorska, Politechnika Śląska: Metoda opisu i modelowania układów cyfrowych z mikroprocesorem, A description method and a modelling system of digital circuits with a microprocessor, Promotor: Prof. dr hab. inż. Ferdynand Wagner. 1983.06.

Prace edycyjne, rozdziały w książkach:

• Proceedings of the 2011 IEEE Design and Diagnostics of Electronic Circuits and Systems, Editors: Heinrich T. Vierhaus, Andreas Steininger, Adam Pawlak, Rolf Kraemer, Mario Schölzel, Jaan Raik, 13-15.04.2011, Cottbus, Germany, IEEE Catalog Number: CFP11DDE-ART, ISBN: 978-1-4244-9756-0.

• Håvard Jorgensen, Svein G. Johnsen, Adam Pawlak, Kurt Sandkuhl, Till Schümmer, Peter Tandler, MAPPER Collaboration Platform for Knowledge intensive Engineering Processes, 3rd Workshop on Information Logistics and Knowledge Supply (ILOG 2010), in conjunction with 13th International Conference on Business Information Systems (BIS 2010), Berlin, Germany, May 4, 2010, W. Abramowicz, R. Tolksdorf, K. Węcel (Eds.): BIS 2010 Workshops, LNBIP 57, pp. 180-191, 2010, Springer-Verlag Berlin Heidelberg 2010.

• Marek Szlęzak, Adam Pawlak, Konrad Wojciechowski, Markup Language Based Design Tool Integration Method Supporting Collaborative Engineering, CollABD’07, 1st Workshop on Integrated Practices for the 21st Century: Collaborative Working Environments, in Collaborative Working Environments for Architectural Design, Edited by G. Carrara, A. Fioravanti, and Y. Kalay Sapienza Univ. and Palombi Editori, Rome, 2010 (ISBN 978-88-6060-261-9), 243-253.

• Håvard Jørgensen, Svein G. Johnsen, Adam Pawlak, Kurt Sandkuhl, Till Schümmer, Peter Tandler, MAPPER collaborative platform of model configured services, CollABD’07, 1st Workshop on Integrated Practices for the 21st Century: Collaborative Working Environments, in Collaborative Working Environments for Architectural Design, Edited by G. Carrara, A. Fioravanti, and Y. Kalay Sapienza Univ. and Palombi Editori, Rome, 2010 (ISBN 978-88-6060-261-9), pp. 119-135.

• Adam Pawlak, Paweł Fraś, Piotr Penkala, Web services-based collaborative system for distributed engineering, PRO-VE’08 9th IFIP Working Conference on Virtual Enterprises, Poznan, Poland, 8 – 10 Sept. 2008, in Pervasive Collaborative Networks, Edited by Luis M. Camarinha-Matos and Willy Picard, Springer, pp. 463-472.

• Svein G. Johnsen, Till Schümmer, Joerg Haake, Adam Pawlak, Håvard Jørgensen, Kurt Sandkuhl, Janis Stirna, Hilda Tellioglu, Gianni Jaccuci, Model-based Adaptive Product and Process Engineering, New Technologies for the Intelligent Design and Operation of Manufacturing Networks – Results and Perspectives from the European AITPL Project Cluster, Rabe, M.; Mihók, P. (eds), Stuttgart, Fraunhofer IRB Verlag 2007 (ISBN 978-3-8167-7520-1), pp.7-27.

• Markus Rabe, Florent Frederix, Peter Mihók, Adam Pawlak, Challenges in Advanced ICT Technology for the Product Lifecycle, New Technologies for the Intelligent Design and Operation of Manufacturing Networks – Results and Perspectives from the European AITPL Project Cluster, Rabe, M.; Mihók, P. (eds), Stuttgart, Fraunhofer IRB Verlag 2007 (ISBN 978-3-8167-7520-1).

• Adam Pawlak, Kurt Sandkuhl, Wojciech Cholewa, Leandro Soares Indrusiak (Eds.) Coordination of Collaborative Engineering – State of the Art and Future Challenges, 5th International Workshop on Challenges in Collaborative Engineering (CCE07), April 11-13, 2007, Cracow, Poland, Lecture Notes in Informatics (LNI) – Proceedings, Volume P-120, ISBN 978-3-88579-214-7, ISSN 1617-5468, Gesellschaft für Informatik, Bonn, Köllen Druck+Verlag GmbH, Bonn, 2007.

• Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino (Eds.): Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. IEEE Computer Society 2007, ISBN 1-4244-1161-0.

• Proceedings of the Workshop on Challenges in Collaborative Engineering CCE06: State of the Art and Future Challenges in Collaborative Design, (CCE06), eds. Leandro Soares Indrusiak, Lennart Karlsson, Adam Pawlak, Kurt Sandkuhl, Prague, April 19-20 2006, ISBN 91-975604-3-X

• Proceedings of the Workshop on Challenges in Collaborative Engineering, (CCE05), eds. Gianni Jacucci, Adam Pawlak, Kurt Sandkuhl, Sopron, April 14-15, 2005, ISBN 91-975604-1-3.

• Magiera J., Pawlak A.: Security frameworks for Virtual Organisations, Virtual Organisations: Systems and Practices, edited by Luis M. Camarinha-Matos, Hamideh Afsarmanesh, and Martin Ollus, 2005 Springer Science+Business Media Inc, ISBN 0-387-23755-0, pp. 133-148.

• Witczyński M., Pawlak A.: Virtual organisations in electronics sector – case study, Virtual Organisations: Systems and Practices, edited by Luis M. Camarinha-Matos, Hamideh Afsarmanesh, and Martin Ollus, 2005 Springer Science+Business Media Inc, ISBN 0-387-23755-0, pp. 221-232.

• A. Pawlak, E-COLLEG: Advanced Infrastructure for Pan-European Collaborative Engineering – 2 page E-Colleg presentation, in Virtual Organisations: Systems and Practices, edited by Luis M. Camarinha-Matos, Hamideh Afsarmanesh, and Martin Ollus, Springer Science+Business Media Inc, pp. 289-290.

• T. Schattkowsky, W. Mueller, A. Pawlak. Workflow Management Middleware for Secure Distance-Spanning Collaborative Engineering. In L. Fischer (ed.) The Workflow Handbook 2004, WfMC, Lighthouse Point, FL, USA, 2004.

• T. Kostienko, W. Mueller, A. Pawlak, T. Schattkowsky, Advanced Infrastructure for Collaborative Engineering in Electronic Design Automation, published in: The Vision for the Future Generation in Research and Applications, J. Cha et al. (eds), © Swets & Zeitlinger, Lisse, Proc. 10th ISPE Int. Conf. on Concurrent Engineering (CE2003), Madeira Island, Portugal, 26-31.07.2003.

• Bauer M., Eikerling H.J., Mueller W., Pawlak A., Siekierska K., Sodeberg X., Warzee X.: Advanced Infrastructure for Pan-European Collaborative Engineering. In: Stanford-Smith B; Chiozza E: E-work and E-commerce, Novel solutions and practices for the global networked economy. pp. 644-650. IOS Press / Ohmsha, Berlin (D), 2001; Also: Conference Proceedings of the e2001 – eBusiness and eWork Conference, Venice (I), 17-19 October 2001.

• Pawlak A., Cellary W., Smirnov A., Warzee X., Willis J.: Collaborative Engineering based on Web – how far to go?, Advances in Information Technologies: The Business Challenge, J.-Y. Roger et al. (Eds.) IOS Press, 1997.

• Levia O., Pawlak A.: (editors): Proceedings of the 2nd Workshop on Libraries, Component Modelling, and Quality Assurance, Toledo, Spain, 23-25 April 1997

• Pawlak A. (editor): Proceedings of the BENEFIT Special Day on pan-European Co-operation and Technology Transfer, Zakopane, Poland, 28 August 1996, ISBN 83-904743-6-0, Published by Institute of Electronics, Silesian Technical University.

• Pawlak A., Servit M.: (editors): Proceedings of the Workshop on Design Methodologies for Microelectronics, Smolenice castle, Slovakia, Sept. 11-13, 1995, Published by Inst. of Computer Systems, Slovak Academy of Sciences, Bratislava, Slovakia.

• Borrione D., Pawlak A.: (editors): Proceedings of the Workshop on Libraries, Component Modelling, and Quality Assurance, ISBN 2-909805-06-9, Nantes, 26-27 April 1995.

Artykuły w czasopismach i książkach:

• Adam Pawlak, Wojciech Sakowski, Piotr Penkala, Paweł Fraś, Szymon Grzybek, Distributed Collaborative Design – A Case Study for Mixed-signal IP Core, Przegląd Elektrotechniczny (Electronic Review), Nr 11a/2010, pp. 111-115.

• M. Szlęzak, A. Pawlak, K. Wojciechowski, XML Markup Language Based Design Tool Integration Method in Distributed Design Environments, Elektronika, Nr 2010/11, pp. 51-54.

• Witczyński, M., Hrynkiewicz, E., Pawlak A., A Web Services based approach to System on a Chip design planning, Workshop on “Challenges in Collaborative Engineering” CCE’07, Krakow, April 2007, Lecture Notes in Informatics (LNI) – Proceedings, Volume P-120, ISBN 978-3-88579-214-7, Gesellschaft für Informatik, Bonn, 2007.

• Adam Pawlak, Håvard D. Jørgensen, Piotr Penkala, Paweł Fraś, Business Process and Workflow Management for Design of Electronic Systems – Balancing Flexibility and Control, Workshop on “Challenges in Collaborative Engineering” CCE’07, Krakow, April 2007, Lecture Notes in Informatics (LNI) – Proceedings, Volume P-120, ISBN 978-3-88579-214-7, Gesellschaft für Informatik, Bonn, 2007.

• K. Siekierska, P. Fraś, A.Kokoszka, T. Kostienko, N. Ługowski, D.Obrębski, A.Pawlak, P. Penkala, D. Stachańczyk, M. Szlęzak, Distributed collaborative design of IP components in the TRMS environment, Microelectronics Reliability, Elsevier Journal, vol. 46 (2006), 5-6, pp. 1019-1024.

• K. Siekierska, A.Kokoszka, D.Obrębski, N. Ługowski, P. Fraś, T. Kostienko, A.Pawlak, P. penkala, D. Stachańczyk, M. Szlęzak, System TRMS w zastosowaniu do projektowania komponentów IP, Elektronika (XLV), no 11/2004, p.9 paper presented also at the MIXDES’04 conference and published in the MIXDES proceedings under title: Verification of TRMS with IP Component Design, MIXDES – Mixed Design of Integrated Circuits and Systems, Szczecin, Poland, June 24-26 2004 (MIXDES’04 outstanding paper award).

• P. Fraś, T. Kostienko, J. Magiera, A. Pawlak, P. Penkala, D. Stachańczyk, M. Szlęzak, M. Witczyński: Collaborative infrastructure for distance – spanning concurrent engineering, PRO-VE’04, in Luis M. Camarinha-Matos (Ed.) “Virtual Enterprises and Collaborative Networks”, 5th IFIP Working Conf. on Virtual Enterprises, Toulouse, France, 23-26 August 2004, Kluwer Academic Publishers, Boston, Dordrecht, London, 2004, pp. 321-328.

• Pawlak A., Inżynieria Rozproszona – nowy paradygmat projektowania wspomaganego dostępem do Internetu, Elektronika nr, 3/2001 (in Polish), also in Proc. of ELTE2000, Polanica Zdrój, Sept. 2000.

• Blüml M., Bouchard F., Pawlak A.: A Flexible Generator of Component Models, “Current Issues in Electronic Modelling”, Kluwer Academic Publishers series, Issue 1 “Model Generation in Electronic Design”, April 1995.

• Liu F., Pawlak A.: Timing Constraints Checks in VHDL – a comparative study, VHDL for Simulation, Synthesis, Formal Proof of Hardware, Jean Mermet ed., Kluwer Academic Publishers, 1992, pp.17-32.

• Fonio H., Pawlak A.: Rule-based synthesis using ADTs and term rewriting, North-Holland, Microprocessing and Microprogramming, Vol. 34 (1992), pp 81-84.

• Wrona W., Pawlak A.: VLSI Integrated Circuit Design Representation in an Object-oriented CAD Environment, North-Holland, Microprocessing and Microprogramming, Vol. 32 (1991), pp 85-92.

• Dubois J-L, Bakowski P., Pawlak A.: Synthesis of programmable control structures for a simulation speed-up, North-Holland, Microprocessing and Microprogramming Vol. 30 (1990) pp. 223-230.

• Papazoglou M, Pawlak A., Wrona W.: Multiprocessor Modelling System as an Example of Object-Oriented Development, North-Holland, Microprogramming and Microprocessing, Vol. 25, (1989), pp. 213-220.

• Grabowiecki T., Pawlak A: PROLOG as a Formalism for VLSI Design Specification, North-Holland, Microprogramming and Microprocessing, Vol. 25, (1989), pp. 157-162.

• Gizdoń H., Pawlak A., Wrona W.: Zastosowanie języka VHDL do opisu i weryfikacji projektów układów cyfrowych (in Polish) – Application of the VHDL language for description and verification of digital circuit designs, Informatyka, No 3, (1989), pp 14-17.

• Gizdoń H., Pawlak A., Wrona W.: Język opisu sprzętu VHDL – podstawowe mechanizmy, (in Polish) – VHDL hardware description language – basic mechanisms, Part 1: Informatyka, No 11-12, (1988), pp15-18, Part 2: Informatyka, No 1, (1989), pp 23-25.

• Pawlak A.: The hardware description language MODLAN, Podstawy Sterowania, Vol. 18, No 3-4 (1988), pp 123-148.

• Gizdoń H., Pawlak A., Wrona W.: VHDL – ADA języków opisu i projektowania sprzętu (in Polish) -VHDL – ADA of hardware description and design languages, Informatyka, No. 10, (1988), pp. 8-11.

• Pawlak A.: On MODLAN HDL subset implementation, Podstawy Sterowania, Vol. 18, No 3-4 (1988), pp 149-166.

• Grabowiecki T., Pawlak A., Sakowski W.: A University Framework for Correct by Construction IC Design, North-Holland, Microprogramming and Microprocessing, Short Note for EUROMICRO’87 Conference.

• Bąkowski P., Pawlak A.: LIDO – A Silicon Compiler Pre-processor, North-Holland, Microprogramming and Microprocessing, Vol. 20 (1987) pp.167-172.

• Pawlak A., Krawczyk J., Kupka A.: FDL – A Language for Digital Systems Modelling on Functional Level, Zeszyty Naukowe Politechniki Slaskiej, z. 53 (in Polish).

• Pawlak A., Jeżewski J., Skiba J.: Realisation of SSM – A Language for Digital Systems Modelling, Zeszyty Naukowe Politechniki Slaskiej, z. 53 (in Polish).

• Pawlak Adam. Inżynieria rozproszona – wyzwania dla wirtualnej współpracy projektantów i zarządzania, 2013. ORGANIZACJA I ZARZADZANIE : KWARTALNIK NAUKOWY, no. 23(3), pp. 121-146

• Pawlak Adam. Wizualne aktywne modele wiedzy narzędziem modelowania sieci współpracy organizacji projektowych, 2014. ZESZYTY NAUKOWE. ORGANIZACJA I ZARZADZANIE / POLITECHNIKA SLASKA, no. 76, pp. 77-98

• Horoba Krzysztof, Jeżewski Janusz, Wróbel Janusz, Pawlak Adam, Czabański Robert, Porwik Piotr and Penkala Piotr. Design Challenges for Home Telemonitoring of Pregnancy as a Medical Cyber-Physical System, 2014. JOURNAL OF MEDICAL INFORMATICS & TECHNOLOGIES, no. 23, pp. 59-66

• Wróbel Janusz, Matonia Adam, Horoba Krzysztof, Jeżewski Janusz, Czabański Robert, Pawlak Adam and Porwik Piotr. Smart Selection of Signal Analysis algorithms for telecare of high-risk pregnancy, 2014. JOURNAL OF MEDICAL INFORMATICS & TECHNOLOGIES, no. 23, pp. 27-34

• Pawlak Adam. Models and collaboration in Medical Cyber-Physical Systems design, 2014. JOURNAL OF MEDICAL INFORMATICS & TECHNOLOGIES, no. 23, pp. 11-16

• Wróbel Janusz, Matonia Adam, Horoba Krzysztof, Jeżewski Janusz, Czabański Robert, Pawlak Adam and Porwik Piotr. Pregnancy telemonitoring with smart control of algorithms for signal analysis, 2015. JOURNAL OF MEDICAL IMAGING AND HEALTH INFORMATICS, vol. 5, no. 6, pp. 1302-1310

• Wróbel Janusz, Jeżewski Janusz, Horoba Krzysztof, Pawlak Adam, Czabański Robert, Jeżewski Michał and Porwik Piotr. Medical cyber-physical system for home telecare of high-risk pregnancy – design challenges and requirements, 2015. JOURNAL OF MEDICAL IMAGING AND HEALTH INFORMATICS, vol. 5, no. 6, pp. 1295-1301

• Jeżewski Janusz, Pawlak Adam, Horoba Krzysztof, Wróbel Janusz, Czabański Robert and Jeżewski Michał. Selected design issues of the medical cyber-physical system for telemonitoring pregnancy at home, 2016. MICROPROCESSORS AND MICROSYSTEMS, vol. 46, pp. 35-43

Recenzowane artykuły prezentowane na konferencjach i warsztatach:

• M. Szlęzak, A. Pawlak, K. Wojciechowski, Markup Language Based Design Tool Integration Method in Distributed Design Environments, Proc. 17th Int. Conference on Mixed Design of Integrated Circuits and Systems, Wrocław, 24-26 June 2010, pp. 294-299.

• Adam Pawlak, Challenges in Collaborative Design in Engineering Networks, eChallenges e-2010 Conference Proceedings, Paul Cunningham and Miriam Cunningham (Eds), IIMC International Information Management Corporation, 2010 ISBN: 978-1-905824-20-5.

• W. Sakowski, S. Grzybek, P. Penkala, A. Pawlak, P. Fraś, Mixed-signal USB IP Core Design Using Distributed Collaborative Approach, 16th Int. Conference (IEEE) Mixed Design of Integrated Circuits and Systems, Łódź, 25-27.06.2009.

• Adam Pawlak, Piotr Penkala, Paweł Fraś, Wojciech Sakowski, Guenter Grau, Szymon Grzybek, Alexander Stanitzki, Distributed Collaborative Design of a Mixed-Signal IP Component , DSD2009, 12th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, Patras, Greece, 27-29 August 2009.

• Adam Pawlak, Paweł Fraś, Piotr Penkala, Integration of Distributed Design Tools Based on Web Services, Work in Progress Session in conjunction with 6th EUROMICRO Int. Conf. on Parallel, Distributed and Network-based Processing, PDP 2008 Toulouse (France), Feb. 13-15, 2008.

• Håvard Jørgensen, Svein G. Johnsen, Adam Pawlak, Kurt Sandkuhl, Till Schümmer, Peter Tandler, MAPPER collaborative platform of model configured services, Pre-Proceedings of CollABD’07, 1st Workshop on Integrated Practices for the 21st Century: Collaborative Working Environments, (G. Carrara and Y. Kalay (eds), Sapienza Univ., Rome, 13-15.12.2007.

• Marek Szlęzak, Adam Pawlak, Konrad Wojciechowski, Markup Language Based Design Tool Integration Method Supporting Collaborative Engineering, Pre-Proceedings of CollABD’07, 1st Workshop on Integrated Practices for the 21st Century: Collaborative Working Environments, (G. Carrara and Y. Kalay (eds), Sapienza Univ., Rome, 13-15.12.2007.

• Adam Pawlak, Piotr Penkala, Pawel Fras, Havard Jorgensen, Wojciech Sakowski, Collaborative engineering approach towards IP-based SoC design, Proc. of IP07 – IP Based Electronic Systems Conference and Exhibition, 5-6.12.2007, Grenoble.

• Adam Pawlak, 1st Conf. on Collaborative Working Environments for Business and Industry (CWE’06), Brussels, 10-11.05.2006, Conference Report (Presentation Summary & Interview), pp. 20-21.

• Pawlak A.: Horizontal Infrastructure for Virtual Organisations Enabling Net-based Engineering, 2nd Ljungby Workshop on Information Logistics, 16-17.09.2004, Ljungby, Sweden.

• P. Fras, T. Kostienko, J. Magiera, A. Pawlak, P. Penkala, D. Stachanczyk, M. Szlezak, M. Witczynski, Survey of Collaborative Engineering Technologies, Proc. CCE’04, Tatranska Lomnica, Slovakia, April 18-21 2004 (ISBN 91-975604-0-5).

• P. Fras, T. Kostienko, J. Magiera, A. Pawlak, P. Penkala, D. Stachanczyk, M. Szlezak, M. Witczynski, TRMS Deployment in Distributed Engineering Applications, Proc. CCE’04, Tatranska Lomnica, Slovakia, April 18-21 2004 (ISBN 91-975604-0-5).

• K. Siekierska, D. Obrebski, A. Kokoszka, N. Lugowski, A. Pawlak, M. Carballeda, B.Schlichter, Verification of advanced collaborative infrastructure by affine FPGA design, Proc. CCE’04, Tatranska Lomnica, Slovakia, April 18-21 2004 (ISBN 91-975604-0-5).

• Piotr Penkala, Darek Stachańczyk, Adam Pawlak, Matthias Bauer: Testbench development in a distributed collaborative environment, 4th Conf. on Electronic Circuits and Systems Conf., Bratislava, Slovakia, Sept. 11-12, 2003.

• Piotr Penkala, Darek Stachańczyk, Adam Pawlak, Matthias Bauer, Wolfgang Ecker, Collaborative development of the REFLECTIVE testbench element, Proc. E-Colleg Workshop on Challenges in Collaborative Engineering, 15th-16th, April 2003, Poznań.

• Artur Kokoszka, Norbert Ługowski, Nguyen Q. Trung, Dariusz Obrębski, Adam Pawlak, Krystyna Siekierska, Manuel Carballeda, Bruno Schlichter, Collaborative Design of the FPGA Pulse Width Modulator, Proc. E-Colleg Workshop on Challenges in Collaborative Engineering, 15th-16th, April 2003, Poznań.

• Tomasz Kostienko, Paweł Fraś, Marek Szlęzak, Adam Pawlak, Development of TRMS/GTLS – Global Tool Lookup Services, Proc. E-Colleg Workshop on Challenges in Collaborative Engineering, 15th-16th, April 2003, Poznań.

• Adam Pawlak, Overview of 5th FP projects and activities in the domain of collaborative engineering, Proc. E-Colleg Workshop on Challenges in Collaborative Engineering, 15th-16th, April 2003, Poznań.

• Maciej Witczynski, Adam Pawlak, Dariusz Kostienko, Pawel Fras, Marek Szlezak, Jaroslaw Magiera, Tool management as a key integration feature for an engineering design virtual organisation, 9th Int. Conference of Concurrent Enterprising Espoo, Finland, 16-18 June 2003.

• Adam Pawlak, The potentials and chances for German – Polish cooperation in the fields of microelectronics and microsystems, 11. Technologietag – Einbeziehung Brandenburger Unternehmen in Wirtschaftsnetze auf Technologiefeldern des 21. Jahrhunderts, Frankfurt (Oder), 5-6 Sept. 2002, ed. H. Richter, GFWW-e.V. Frankfurt (Oder) 2003.

• Maciej Witczyński, Adam Pawlak, Virtual Organisations Enabling Net-based Engineering, Conf. “eBusiness and eWork 2002”, Prague, 16-18.10.2002, published in: Challenges and Achievements in E-business and E-work, Eds. Brian Stanford-Smith, Enrica Chiozza, and Mireille Edin, IOS Press, Amsterdam, 2002, pp. 908-915.

• Artur Kokoszka, Krystyna Siekierska, Nguyen Quang Trung, Paweł Fraś, Adam Pawlak, Are Workflow Management Systems useful for Collaborative Engineering ?, 2002 ECPPM, eWork and Business in AEC, Portorož, Slovenia,Sept. 9-11, A.Balkema Publishers, pp. 245-252.

• M. Bauer, P. Penkala, A. Pawlak, D. Stachańczyk, P. Fraś, Collaborative Environment for Testbench Development, Euromicro DSD2002 (Digital System Design) Symposium, Work in Progress Session, Dortmund, 4-6.09.2002.

• Maciej Witczyński, Adam Pawlak, A New Paradigm of Engineering Work enabled by Internet-based Virtual Organisations, 2002 IEEE DDECS (Design and Diagnostics of Electronics Circuits and Systems Workshop, 17-19 April 2002, Brno, Czech Republic.

• Nguyen Quang Trung, Artur Kokoszka, Krystyna Siekierska, Adam Pawlak, Dariusz Obrębski, Norbert Ługowski, Organization of a Microprocessor Design Process Using Internet-based Interoperable Workflows, 3rd Int. IEEE Symposium on Quality Electronic Design, 18-21 March 2002, San Jose, CA, USA.

• Chojcan J., Pawlak A., Szlęzak M., Wideokonferencja ¬ elementem technologii współpracy wykorzystującej Internet, Mat. Konf. Telekomunikacja w Uprzemysłowionych Aglomeracjach Miejskich – Dziś i Jutro”, TELPRZEM 2001, Gliwice 21-22 czerwca 2001, ss. 91-98.

• Kokoszka A., Nguyen Q.T., Siekierska K., Pawlak A., Obrębski D., Ługowski N.: Distributed Design of Semiconductor IP Based on the Workflow Concept, Proc. of the IEEE Design and Diagnostics of Electronic Circuits and System Workshop, Gyor, 18-20 April, 2001, pp. 299-306.

• Pawlak A.:, Bouchard F., Bąkowski P.: Survey on VHDL Modelling Guidelines, 2nd Workshop on . “Libraries, Component Modelling, and Quality Assurance”, 23-25 April 1997, Toledo, Spain.

• Pułka A., Pawlak A.: Experiences with VITAL Code Generator Controlled by a Nonmonotonic Inference Engine, 2nd Workshop on . “Libraries, Component Modelling, and Quality Assurance”, 23-25 April 1997.

• Pułka A., Pawlak A.: A Technique For Generation of VITAL Models Handling Incomplete Information, Proceedings of the 22nd EUROMICRO Conference Beyond 2000: Hardware/Software Design Strategies, Short Contributions, IEEE Computer Society Press, Los Alamitos, CA 1997, pp. 132-137.

• Blüml M., Bouchard F., Pawlak A.: A Technique for a Flexible Generation of Component Models, Proc. Workshop on “Design Methodologies for Microelectronics and Signal Processing”, Cracow, Oct. 1993.

• Blüml, Lenzen M., Pawlak A.: A Workbench for Generation of Component Models, Proc. EURO-VHDL’93, Hamburg, Sept. 1993.

• Pawlak A.: Selected aspects of component modelling, (invited short note in ESPRIT ECIP project session), Proc. EURO-VHDL’92, Hamburg, Sept. 1992.

• Feltin T., Lenzen M., Pawlak A.: Technological Aspects in VHDL Models of Standard Components, PATMOS Workshop, Paris, Sept. 1992.

• Blüml M., Lenzen M., Kierdorf B., Pawlak A.: A Methodology for the Development of High Quality Standard – Cell Models in VHDL, VHDL Forum for CAD in Europe, Santander, Spain, April, 1992.

• Bąkowski P., Dubois J-L, Pawlak A.: A technique for generating efficient simulators, Proc. of ICCD’91, Cambridge, USA, October, 1991, pp. 105-108.

• Dubois J. L., Liu F., Pawlak A.: Standard Component Modelling in VHDL, Proc. 7th Symposium “Fortschritte in der Simulationstechnik (Band 4), Sept. 1991, Hagen, pp. 401-405.

• Liu F., Pawlak A.: Timing Constraints Checks in VHDL – a comparative study, Proc. EURO-VHDL’91, Stockholm, Sept. 1991.

• Blüml M., Lenzen M., Pawlak A.: Standardzellenmodellierung in VHDL, (in German) Synthese- und Verifikationsverfahren auf der Basis von VHDL (Workshop), P. Marwedel (Editor), “Forschungsbericht Nr. 379”, Univ. of Dortmund, March, 1991.

• Liu F., Pawlak A.: Timing Constraint Checks in VHDL, Synthese- und Verifikationsverfahren auf der Basis von VHDL (Workshop), P. Marwedel (Editor) , Forschungsbericht Nr. 379, Univ. of Dortmund, March, 1991.

• Pawlak A.: Standards in design automation versus KARL/ABL design environment, (invited paper), Proc. 2nd Abakus workshop, Innsbruck, 1988.

• Pawlak A.: High-level Design Tools – The E.I.S. Perspective, 3rd E.I.S. Workshop, Bonn, 1987.

• Pawlak A., Wrona W.: A Modern Object-Oriented Programming Language as a HDL, Proc. IFIP Conf. on Computer Hardware Description: Languages and their Applications, Amsterdam, 1987.

• Pawlak A.: A Tutorial Guide to Modern Hardware Description and Design Languages, Microcomputers, usage and design, K. Waldschmidt and B. Myhrhaug (eds), Proc. EUROMICRO Conf., Brussels, 1985.

• Pawlak A.: Computer Aided Design – Current Problems, (invited paper), Conf. on “Organisation and Management of a Design Process”, Kolobrzeg, 1985 (in Polish).

• Pawlak A.: A Tutorial Introduction into Hardware Description Languages, AMSE Int. Conf. “Modelling and Simulation”, Minneapolis, 1984 (digest of papers).

• Pawlak A.: Microprocessor modules modelling in MODLAN – Hardware Description Language – a case study for PICU, Advances in Microprocessing and Microprogramming, B. Myhrhaug, D. Wilson (eds.), EUROMICRO Conf., Copenhagen, 1984.

• Pawlak A.: Microprocessor Systems Modelling in MODLAN, Proc. 20th Design Automation Conference, Miami Beach, 1983.

• Pawlak A.: A Hierarchical Simulator as a Tool for Microprocessor System Design Verification, Int. Meeting on “Development Aids for Microprocessor Systems”, Liege, 1982.

• Pawlak A.: Digital Logic Modelling System Based on MODLAN, Proc. 19th Design Automation Conference, Las Vegas, 1982.

• Jeżewski J., Pawlak A.: MODSIM – A Language for Control of Digital Logic Simulation, Proc. of Third Microelectronics Conf., Siofok, 1982 (poster, digest of papers).

• Pawlak A., Jeżewski J.: Digital System Modelling with MODLAN, Proc. of Third Microelectronics Conf., Siofok, 1982 (poster, digest of papers).

• Pawlak A., Jeżewski J.: MODLAN – A Language for Multilevel Description and Modelling of Digital Systems, Int. Symp. on CHDLs, Kaiserslautern, 1981.

• Pawlak A., Leśnik B, Pabianczyk-Lesnik L.: MICRO-BASIC for INTEL 8080 Microprocessor, Proc. Conf. on “Microprocessors and their Applications”, Katowice, 1980 (in Polish).

• Gizdoñ H., Jeżewski J., Kupka A., Pawlak A.: TSSM System of Digital Circuits Modelling on Gate and Functional Levels, Proc. Second Microelectronics Conf. of Socialistic Countries, MIKROELEKTRONIKA 80, Toruń, 14-16.05.1980 (in Russian).

• Gizdoń H., Pawlak A.: Problems of Microprocessor Systems Modelling, Proc. Second Microelectronics Conf. of Socialistic Countries, MIKROELEKTRONIKA 80, Toruń, 14-16.05.1980 (in Russian).

• Jeżewski J., Pawlak A.: Description Methods of Complex Digital Circuits – an Overview, Proc. Second Microelectronics Conf. of Socialistic Countries, MIKROELEKTRONIKA 80, Toruń, 14-16.05.1980 (in Russian).

• Gizdoń H., Pawlak A.: Digital Systems Modelling in TSSM System, Proc. Third National Conf. on Circuits Theory and Electronic Systems, Stawiska near Gdańsk, Poland 24-27.10.1979 (in Polish).

• Frąckowiak J., Pawlak A., Babarowski T., Oczko M.: Cross-assembler für den Mikroprozessor INTEL 8080 auf die Rechner ODRA 1300, Bauelementekonferenz der Mikroelektronik, Dresden, 5-6.10.1978 (in Russian).

• Pawlak A.: Ein Translator der SSM – Programmiersprache zur Beschreibung und Simulierung von logischen asynchronen Schaltungen, Bauelementekonferenz der Mikroelektronik, Dresden, 5-6.10.1978 (in Russian).

• Pawlak A.: Cross-assembler for INTEL 8080 Microprocessor for ODRA 1300 (ICL 1900) Series of Computers, Proc. Conf. on “Microprocessors; Architecture, Applications”, Katowice, 1978 (in Polish).

• Jeżewski Janusz, Wróbel Janusz, Horoba Krzysztof, Pawlak Adam, Jeżewski Michał and Czabański Robert. Medyczne systemy cyber–fizyczne dla domowej teleopieki ciężarnych, 2015. XIX Krajowa Konferencja Naukowa Biocybernetyka i Inżynieria Biomedyczna, 14/10/2015-16/10/2015, Warszawa, pp. 236

• Matonia Adam, Horoba Krzysztof, Roj Dawid, Pawlak Adam, Czabański Robert and Jeżewski Michał. Telemonitorowanie zagrożeń w ciąży z inteligentnym doborem algorytmów analizy sygnałów, 2015. XIX Krajowa Konferencja Naukowa Biocybernetyka i Inżynieria Biomedyczna, 14/10/2015-16/10/2015, Warszawa, pp. 235

• Horoba Krzysztof, Jeżewski Janusz, Wróbel Janusz, Kupka Tomasz, Pawlak Adam, Czabański Robert and Jeżewski Michał. Design and interfacing aspects of the medical instrumentation for modern hospital system for pregnancy and labour monitoring, 2016. 23rd International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES), 23/06/2016-25/06/2016, Lodz, POLAND. PROCEEDINGS OF THE 23RD INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (MIXDES 2016), ISBN: 978-8-3635-7808-4, pp. 492-497

• Koczor Arkadiusz, Matoga Łukasz, Penkala Piotr and Pawlak Adam. Verification Approach Based on Emulation Technology, 2016. IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 20/04/2016-22/04/2016, Kosice, SLOVAKIA. 2016 IEEE 19TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), ISBN: 978-1-5090-2467-4, pp. 169-174

Inne prace i raporty badawcze :

• MAPPER deliverable D13 Standardisation Activities Report. Håvard D. Jørgensen (AKM), Jarosław Magiera (SUT), Adam Pawlak (SUT), Till Schümmer (FUH), Marek Szlęzak (SUT), Peter Tandler (IGD), Maciej Witczyński (SUT), 2008-02-25, 58 pages, Raport dostępny z http://maper.eu.org

• MAPPER deliverable D15 Collaborative design process – model, analysis and evaluation, Paweł Fraś (SUT), Adam Pawlak (SUT), Piotr Penkala (SUT), Havard Jorgensen (AKM), Szymon Grzybek (Evatronix), Wojciech Sakowski (Evatronix), Guenter Grau (advICo), Gianni Jacucci (Univ. Trento), Marek Szlęzak (SUT), Maciej Witczyński (SUT), 2008-04-03, 71 pages, Raport dostępny z http://maper.eu.org.

• MAPPER deliverable D17 Final Plan for using and disseminating knowledge. Edited by A. Pawlak (SUT) with contributions from all partners, Confidential Report, 2008-04-02, 38 pages.

• MAPPER deliverable D19 Evaluation of the achieved impacts and outcomes of the exploitation and dissemination activities, Edited by A. Pawlak (SUT) with contributions from all partners, Confidential Report, 2008-03-29, 32 pages.

• MAPPER Deliverable D9 Exploitation, dissemination and Technology Implementation Plan – version 1.

• MAPPER Deliverable D8 Collaboration Infrastructure. Håvard D. Jørgensen (AKM), Dag Karlsen (AKM), Pawel Fras (SUT), Adam Pawlak (SUT), Piotr Penkala (SUT), Peter Tandler (FhG), Michael Plomer (FhG), Till Schümmer (FernUni).

• Carballeda M., Pawlak A.: E-Colleg Final Report, E-Colleg report to EU, 55 pages, www.ecolleg.org, 2004-04-24.

• Pawlak A., Stachańczyk D. Szlęzak M.: E-Colleg project report D8.2.1 Virtual Project Management Infrastructure, 28 pages, 2002-03-27.

• Pawlak A., Penkala P., Siekierska K.: E-COLLEG IST-1999-11746, Advanced Infrastructure for Pan-European Collaborative Engineering, Conf. on Inauguration of the Sixth Framework Programme of the European Union in Central and Eastern Europe in the European Research Area, Warsaw, 25-26 Nov. 2002 (abstract/poster).

• Pawlak A. et E-Colleg partners, E-Colleg Revised DoW, E-Colleg Report to EU, 2001.05.

• Pawlak A.: A few thoughts on BENEFIT and Collaborative Engineering, Grabowiecki T., Lukacs J. (Eds.) Proc. of the BENEFIT Day on Pan-European Co-operation and Technology Transfer, Budapest, 29.10.1997.

• Pawlak A.: VITAL, OMF, and ALEX dominate discussions over ASIC libraries standards in Grenoble and Nantes, Report for the ECSI Newsletter, July 1995.

• Borrione D., Pawlak A.: Report for VHDL-Newsletter from the ESPRIT Project 8370-ESIP Workshop on “Libraries, Component Modelling, and Quality Assurance” held in IRESTE – IH, Nantes on April 26-27 in conjunction with VHDL-Forum Spring’95.

• Pawlak A., Jordan A: Europäische Forschungskooperationen mit Zentral- und Osteuropa – Erfahrungsbericht und praktizierter Ansatz am Beispiel eines Workshops in Polen (European co-operation in science with Central and East Europe – Experience report from the Workshop in Poland), Gliwice, Cracow, Oct. 1993, EURO tele-bits, No. 6, May 1994.

• Dubois J-L, Liu F., Pawlak A.: Standard Component Modelling in VHDL, ECIP WP3 (ESPRIT Project 2072) Report, December, 1991.

• Gizdoń H., Pawlak A., Wrona W.: Lecture notes on Hardware Description Languages – Introduction to VHDL, Arbeitspapiere der GMD, No 297, March 1988, 44 pages.

• Pawlak A.: Lecture notes on Hardware Description Languages -Introduction, Arbeitspapiere der GMD, No 255, June 1987, 46 pages.

• Pawlak A.: Some Aspects of MODLAN Subset Implementation, Institute of Computer Science, Polish Academy of Sciences, Report No. 567, Warsaw, Sept. 1985, 74 pages..

• Pawlak A.: MODLAN – A Hardware Module Description Language, Institute of Computer Science, Polish Academy of Sciences, Report No 532, Warsaw, Dec. 1983, 96 pages.

Projekty badawcze :

• MAPPER – Model-based Adaptive Product and Process Engineering FP6-2004-IST-NMP-2 Project No 016527, 09.2005-02.2008, http://mapper.eu.org

• VOSTER – Virtual Organisations Cluster, 5th FP, IST-2001-32031, http://voster.vtt.fi

• E-Colleg – Advanced Infrastructure for Pan-European Collaborative Engineering IST-1999-11746, Start date: 01.01.2000 End date: 31.12.2003, http://www.ecolleg.org Adam Pawlak was a technical co-ordinator of E-Colleg.

• BENEFIT – Concerted Action for Stimulation and Support of East-West Collaborations in the Area of Microelectronics and Signal Processing, Copernicus94 Nb. 536, 1995-1997, http://www.ciel.pl/projects/Past-Projects/Benefit/BENEFIT-About.htm

• ESIP – EDA Standards Integration and Promotion, ESPRIT Project 8370, 1993-95.

• ECIP – European CAD Integration Project, ESPRIT Project 2072, 1991-1992

• A CAD environment for VLSI design – SUT, Gliwice and ICS PAS (IPI PAN), Warsaw – Poland. 1985-1989.